1. Field of the Invention
This disclosure relates to integrated circuit design, and, more particularly to memory design.
2. Description of the Related Art
To obtain higher performance and increased integration levels in today's circuit designs, feature sizes are becoming ever smaller. These smaller feature sizes have lead to reduced gate oxide thickness and reduced threshold voltages. The reduced gate oxide thickness and reduced threshold voltages have resulted in increases in both gate leakage and sub-threshold leakage currents. This, in turn, has resulted in an increase in power consumption in circuits utilizing these smaller feature sizes.